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INTEGRATED CIRCUITS
DATA SHEET
TDA8350Q DC-coupled vertical deflection and East-West output circuit
Preliminary specification Supersedes data of September 1991 File under Integrated Circuits, IC02 January 1995
Philips Semiconductors
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
FEATURES * Few external components * Highly efficient fully DC-coupled vertical output bridge circuit * Vertical flyback switch * Guard circuit * Protection against: - short-circuit of the output pins - short-circuit of the output pins to VP * High EMC immunity due to common mode inputs * Temperature (thermal) protection * East-West output stage with one single conversion resistor. QUICK REFERENCE DATA SYMBOL DC supply VP IP Vertical circuit IO(p-p) Idiff(p-p) Vdiff(p-p) output current (peak-to-peak value) differential input current (peak-to-peak value) differential input voltage (peak-to-peak value) - - - - 600 1.5 supply voltage quiescent current 9 - - 30 PARAMETER CONDITIONS MIN. TYP. GENERAL DESCRIPTION
TDA8350Q
The TDA8350Q is a power circuit for use in 90 and 110 colour deflection systems for field frequencies of 50 to 120 Hz. The circuit provides a DC driven vertical deflection output circuit, operating as a highly efficient class G system and an East-West driver for sinking the diode modulator current.
MAX.
UNIT
25 -
V mA
3 - 1.8
A A V
Flyback switch IM VFB peak output current flyback supply voltage note 1 East-West amplifier IO(sink) VO(sink) Ibias Tstg Tamb Tvj Note 1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 resistor (dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of 33 (see application circuit Fig.5). January 1995 2 output current (sink only) peak output voltage input bias current IO(sink) = 10 A - - - -65 -25 - - - - - - - 500 40 1 mA V A C C C - - - - - - 1.5 50 60 A V V
Thermal data (in accordance with IEC 747-1) storage temperature operating ambient temperature virtual junction temperature 150 +75 150
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8350Q BLOCK DIAGRAM DBS13P DESCRIPTION
TDA8350Q
VERSION SOT141-6
plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm)
handbook, full pagewidth
VP 4 VP
VO(guard) 10
VFB 8
CURRENT SOURCE
TDA8350
VP 9 VO(A) IS VO(A)
I drive(pos)
1
IT IT
3
V I(fb)
I drive(neg)
2 V IS
VP
5 VO(B) 13 I I(set)
VO(B)
I I(set)
I I(corr)
12
11
VO(sink)
7 GND
MBC229-1
Fig.1 Block diagram.
January 1995
3
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
PINNING SYMBOL Idrive(pos) Idrive(neg) VI(fb) VP VO(B) n.c. GND VFB VO(A) VO(guard) VO(sink) II(corr) II(set) PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 DESCRIPTION input power-stage (positive); includes II(sb) signal bias input power-stage (negative); includes II(sb) signal bias feedback voltage input supply voltage output voltage B not connected ground flyback supply voltage output voltage A guard output voltage East-West amplifier driver (sink) output voltage East-West amplifier input correction current (negative) East-West amplifier set input current (positive) FUNCTIONAL DESCRIPTION
TDA8350Q
The vertical driver circuit is a bridge configuration. The deflection coil is connected between the output amplifiers, which are driven in phase opposition. An external resistor (RM) connected in series with the deflection coil provides internal feed back information. The differential input circuit is voltage driven. The input circuit has been adapted to enable it to be used with the TDA9150, TDA9151B, TDA9160A, TDA9162, TDA8366 and TDA8367 which deliver symmetrical current signals. An external resistor (RCON) connected between the differential input determines the output current through the deflection coil. The relationship between the differential input current and the output current is defined by: Idiff x RCON = I(coil) x RM. The output current is adjustable from 0.5 A (p-p) to 3 A (p-p) by varying RM. The maximum input differential voltage is 1.8 V. In the application it is recommended that Vdiff = 1.5 V (typ). This is recommended because of the spread of input current and the spread in the value of RCON. The flyback voltage is determined by an additional supply voltage VFB. The principle of operating with two supply voltages (class G) makes it possible to fix the supply voltage VP optimum for the scan voltage and the second supply voltage VFB optimum for the flyback voltage. Using this method, very high efficiency is achieved. The supply voltage VFB is almost totally available as flyback voltage across the coil, this being possible due to the absence of a decoupling capacitor (not necessary, due to the bridge configuration). The output circuit is fully protected against the following: * thermal protection * short-circuit protection of the output pins (pins 5 and 9) * short-circuit of the output pins to VP.
dbook, halfpage
I drive(pos) I drive(neg) V I(fb) VP V O(B) n.c. GND V FB VO(A)
1 2 3 4 5 6 7 8 9
TDA8350
A guard circuit VO(guard) is provided. The guard circuit is activated at the following conditions: * during flyback * during various short-circuit possibilities at the output pins * during open loop * when the thermal protection is activated. This signal can be used for blanking the picture tube screen. An East-West amplifier is also provided. This amplifier is an inverting amplifier which is current driven with sink current only capabilities.
VO(guard) 10 V O(sink) 11 I I(corr) I I(set) 12 13
MBC226-1
Fig.2 Pin configuration.
January 1995
4
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL DC supply VP VFB Vertical circuit IO VO(A) Flyback switch IM VO(sink) IO(sink) Tstg Tamb Tvj Rth vj-c Rth vj-a tsc Notes peak output current IO(sink) = 10 A; note 3 VO(sink) = 2 V; note 3 - - - -65 -25 - - - note 4 - output current (peak-to-peak value) output voltage (pin 9) note 1 note 2 - - supply voltage flyback supply voltage note 1 non-operating - - - PARAMETER CONDITIONS MIN.
TDA8350Q
MAX.
UNIT
40 25 50 60
V V V V
3 52 62 1.5
A V V
A
East-West amplifier output voltage output current 40 500 V mA C C C K/W K/W hr
Thermal data (in accordance with IEC 747-1) storage temperature operating ambient temperature virtual junction temperature resistance vj-case resistance vj-ambient in free air short-circuiting time 150 +75 150 4 40 1
1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 resistor (dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of 33 (see application circuit Fig.5). 2. IO maximum determined by current protection. 3. The operating area is limited by a straight line between the points VO(sink) = 40 V; IO(sink) = 10 A and VO(sink) = 2 V; IO(sink) = 500 mA. 4. Up to Vp = 18 V.
January 1995
5
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
TDA8350Q
CHARACTERISTICS VP = 17.5 V; VFB = 45 V; VO(sink) = 20 V; fi = 50 Hz; II(sb) = 400 A; Tamb = 25C; measured in test circuit of Fig.3; unless otherwise specified. SYMBOL DC supply VP VFB IP VO operating supply voltage flyback supply voltage note 1 supply current no signal; no load Vertical circuit output voltage swing (scan) Idiff = 0.6 mA (p-p); Vdiff = 1.8 V (p-p); IO = 3 A (p-p) IO = 3 A (p-p); IO = 50 mA (p-p); note 2 VO VDF |Ios| |Vos| VosT VO(A) Gv output voltage swing (flyback) VO(A) - VO(B) forward voltage of the internal efficiency diode (VO(A) - VFB) output offset current offset voltage at the input of the feedback amplifier VI(fb) - VO(B) Idiff = 0.3 mA; IO = 1.5 A (M) IO = -1.5 A (M); Idiff = 0.3 mA Idiff = 0; II(sb) = 50 to 500 A Idiff = 0; II(sb) = 50 to 500 A 19.8 - - V 9 Vp - - - - - 30 25 50 60 55 V V V mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
LE
linearity error
- - - - - - - - - - -
1 1 39 - - - - 8 80 80 0 40 5000 - 400 - 80 2.7 - 0.1 0.2
2 2 - 1.5 30 18 72 - - - - - - 10-4 500 100 - - 1.6 0.5 -
% % V V mA mV V/K V dB dB dB Hz /K A A dB V V A mA
output offset voltage as a function Idiff = 0; of temperature DC output voltage open loop voltage gain (V9-5/V3-5; V1-2 = 0) Idiff = 0; note 3 note 4 open loop voltage gain (V9-5/V1-2) notes 4 and 5
VR fres GI GIT II(sb) IFB PSRR VI(DC) VI(CM) Ibias IO(CM)
voltage ratio V1-2/V3-5 frequency response (-3 dB) current gain (IO/Idiff) current gain drift as a function of temperature signal bias current flyback supply current power supply ripple rejection DC voltage at the input common mode input voltage input bias current common mode output current II(sb) = 0 II(sb) = 0 II(sb) = 300 A (p-p); fi = 50 Hz; Idiff = 0 during scan note 7 note 6
- - - 50 - - - 0 - -
January 1995
6
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
SYMBOL East-West amplifier VO(sink) Gv fres LE Ibias VI(DC) Iset V13-7 saturation voltage open loop voltage gain (V11/V12) frequency response (-3 dB) linearity error input bias current (pin 12) DC input voltage offset voltage set current maximum allowed voltage at pin 13 VO(sink) = 3 V VO(sink) = 10 V; note 2 IO(sink) = 500 mA; II(corr) = 0 A; note 8 - - - - - - - - - 2.0 47 4000 - - - 1 1 - PARAMETER CONDITIONS MIN. TYP.
TDA8350Q
MAX.
UNIT
2.5 - - 1 0.5 2 - - 0.3
V dB Hz % % A V mA V
Guard circuit IO output current output current VO(guard) output voltage allowable voltage on pin 10 Notes 1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 resistor (dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of 33 (see application circuit Fig.5). 2. The linearity error is measured without S-correction and based on the same measurement principle as performed on the screen. The measuring method is as follows: Divide the output signal I5 - I9 (VRM) into 22 equal parts ranging from 1 to 22 inclusive. Measure the value of two succeeding parts called one block starting with part 2 and 3 (block 1) and ending with part 20 and 21 (block 10). Thus part 1 and 22 are unused. The equations for linearity error for adjacent blocks (LEAB) and not adjacent blocks (NAB) are given below; a max - a min ak - a ( k + 1) LEAB = ----------------------------- ; NAB = ----------------------------a avg a avg 3. Referenced to VP. 4. V values within formulae, relate to voltages at or between relative pin numbers, i.e. V9-5/V1-2 = voltage value across pins 9 and 5 divided by voltage value across pins 1 and 2. 5. V3-5 AC short-circuited. 6. Frequency response V9-5/V3-5 is equal to frequency response V9-5/V1-2. 7. At V(ripple) = 500 mV eff; measured across RM; fi = 50 Hz. 8. The output pin 11 requires a capacitor of minimum value 68 nF. not active; VO(guard) = 0 V active; VO(guard) = 4.5 V IO = 100 A maximum leakage current = 10 A - 1 - - - - - - 50 2.5 5.5 40 A mA V V
January 1995
7
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
TDA8350Q
handbook, full pagewidth
VO(guard) 10 I I(sb) signal bias I drive(pos) R CON 3 k I drive(neg) signal bias I I(sb) EAST WEST-AMPLIFIER I I(corr) 12 I SET 68 nF 36 I diff 2 V 5 1 FEEDBACK 3 PULSE 8 4 VP
VFB
TDA8350
9 R = 6.2
R M = 0.6
VO(sink)
13 68 k
7 GND
MBC228
Fig.3 Test circuit.
January 1995
8
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
APPLICATION INFORMATION
TDA8350Q
handbook, full pagewidth
VO(guard) 10 I I(sb) signal bias I drive(pos) R CON 3 k I drive(neg) signal bias I I(sb) EAST WEST-AMPLIFIER I I(corr) 12 I SET I diff 2 V 5 VO(B) 1 FEEDBACK 3 PULSE 8 4 100 nF 9 VO(A) I (coil) V I(fb)
VFB
VP
TDA8350
deflection coil AT6005/31 L = 8.63 mH R = 5.0 R M = 0.7
to line output stage VO(sink) 68 nF
13
7 GND
MBC227
68 k
VP = 14 V; IO(p-p) = 2.14 A; II(sb) = 400 A; Idiff(p-p) = 500 A; VFB = 42 V; tFB = 0.6 ms.
Fig.4 Application diagram.
January 1995
9
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
TDA8350Q
ook, full pagewidth
VO(guard) 10 I I(sb) signal bias I drive(pos) R CON 3 k I drive(neg) signal bias I I(sb) EAST WEST-AMPLIFIER I I(corr) 12 I SET I diff 2 V 1 FEEDBACK 3 PULSE V I(fb) R M = 0.7 8 4 100 nF 9 VO(A) I (coil) 220 nF 20 VP
VFB
TDA8350
deflection coil AT6005/31 L = 8.63 mH R = 5.0
5 VO(B)
to line output stage VO(sink) 68 nF
13
7 GND
MGC054
68 k
VP = 14 V; IO(p-p) = 2.14 A; II(sb) = 400 A; Idiff(p-p) = 500 A; VFB = 60 V; tFB = 0.4 ms.
Fig.5 Application circuit; 50 V VFB 60 V.
January 1995
10
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
PACKAGE OUTLINE
TDA8350Q
handbook, full pagewidth
24.4 23.6 20.0 19.6 0.05 convex 10 mounting base 4.7 4.1
A 12.4 11.6 3.4 3.1 6 17.0 15.5
13
12
11
10
9
8
7
6
5
4
3
2
1
seating plane
2.4 1.6
13 11
2.1 1.8
2.20 1.45
0.75 0.60
0.25 M (13x)
1.7 3.4 (12x)
0.55 0.35 5.08
0.8 M A (13x) 4.3
MBC369
Dimensions in mm.
Fig.6 Plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm); (DBS13P; SOT141-6).
January 1995
11
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
SOLDERING Plastic DIL-bent-SIL packages BY DIP OR WAVE The maximum permissible temperature of the solder is 260 C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8350Q
specified storage maximum. If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply the soldering iron below the seating plane (or not more than 2 mm above it). If its temperature is below 300 C, it must not be in contact for more than 10 s; if between 300 and 400 C, for not more than 5 s.
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
January 1995
12
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
NOTES
TDA8350Q
January 1995
13
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
NOTES
TDA8350Q
January 1995
14
Philips Semiconductors
Preliminary specification
DC-coupled vertical deflection and East-West output circuit
NOTES
TDA8350Q
January 1995
15
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All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
533061/1500/02/pp16 Document order number: Date of release: January 1995 9397 744 70011
Philips Semiconductors

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